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  bcm5482 ? dual-port 10/100/1000base-t gigabit ethernet transceiver bcm5482 system diagram ? dual-port integrated 10base-t/100base-tx/1000base-t gigabit ethernet transceiver .  rgmii, sgmii, and serdes mac interface options.  1-gbps line-side serdes with rgmii mac interface.  fully compliant with ieee 802.3, ieee 802.3u, and ieee 802.3ab standards.  0.13-micron cmos?low power and cost.  supports copper or fiber in rgmii mode.  low power.  600 mw per port.  advanced power management.  trace-matched output impedance.  line-side and mac-side loopback.  low emi emissions.  cablechecker? diagnostics.  cable plant analyzer function detects cable plant impairments.  ethernet@wirespeed.  automatic mdi/mdix crossover at all speeds.  robust cable-sourced electrostatic discharge (cesd) tolerance.  support for jumbo packets up to 10 kb.  ieee 1149.1 (jtag) boundary scan.  121-pin bga package.  low-power, dual-port integration reduces design constraints for space-constrained ip phone applications.  compact solution for 10/100base-tx uplink applications.  provides compatibility with ieee standard devices operating at 10, 100, and 1000 mbps at half-duplex and full-duplex.  clock timing can be adjusted to eliminate board trace delays required by the rgmii specification.  lowers system bom cost a nd simplifies system design.  eases system level debugging.  enables use of low-cost magnetics.  cable diagnostic function characterizes cable plant condition and immediately indicates cabling issues.  prevents erroneous equipment return due to bad cable plants.  prevents manufacturing fallout due to bad cable plants.  allows immediate uptime at reduced speeds (100base-tx or 10base-t).  over 3 kv of cesd tolerance prevents equipment damage and return.  operates with larger packets for wider range of packet protocol support and improved efficiency.  ease of manufacturing with jtag support, simplified power supply, and multiple mac interfaces. features summary of benefits bcm5482
overview ? phone: 949-450-8700 fax: 949-450-8710 e-mail: info@broadcom.com web: www.broadcom.com broadcom corporation 16215 alton parkway, p.o. box 57013 irvine, california 92619-7013 ? 2005 by broadcom corporation. all rights reserved. 5482-pb00-r 4/29/05 broadcom ? , the pulse logo, quadsquad ?, and connecting everything ? are trademarks of broadcom corporation and/or its subsidiaries in the united stat es and certain other countries. all other trademarks mentioned are the property of their respective owners. a member of broadcom?s third generation of gigabit ethernet phys, the bcm5482 consists of two complete 10/100/1000base-t gigabit ethernet transceivers integrated on a single monolithic cmos chip. the bcm5482 is optimized for low power and small footprint size to reduce design complexity for space-constrained ip phone applications. for 10/ 100base-tx applications, the single package offers a compelling advantage over two single devices for gigabit uplinks. the bcm5482 dsp-based architecture and advanced power management techniques combine to achieve robust and low-power operation over existing category 5 twisted-pair wiring. the bcm5482 architecture not only meets th e requirements of ieee 802.3, ieee 802.3u, and ieee 802.3ab, but also maintains the industry?s highest level of margin over ieee requirements for echo, near-end crosstalk (next), and far-end crosstalk (fext). with the industry's lowest power at 600 mw per port, the bcm5482 assists in reducing the power distribution requirements of ip phone systems. in addition, the bcm5482 has extremely low emi emissions, which reduces the design constraints required to meet emi radiation specifications. the bcm5482 supports the rgmii, sgmii, and serdes mac interfaces. the rgmii, sgmii, and serial serdes inteerfaces are reduced-pin-count (12, 6, and 4, respectively, versus 25) versions of the gmii. the rgmii clock timing can be adjusted to eliminate the board trace delays required by the rgmii specification. these reduced-pin- count interfaces simplify design and lower system cost by reducing the number of layers required for signal routing. in addition, these interfaces allow fewer pins at the mac/switch, which reduces the mac/switch cost by enabling smaller die sizes than would be possible with full gmii. this device is another member of broadcom?s 0.13-m gigabit ethernet copper phy family, joining more than 25 other quad and single products. the 0.13-m process is the optimal process that offers the best performance, lowest cost, and lowest power for gigabit ethernet copper solutions. broadcom continues to expand its leadership in 0.13-m technology with the bcm5482 , part of its third generation of 0.13-m gigabit ethernet copper transceivers. each bcm5482 port is fully independent and has individual interface, control, and status registers, and incorporates a number of advanced features. this includes identifying physical wiring defects that the bcm5482 cannot automatically correct for, and channel conditions such as excessive cable length and return loss, crosstalk, echo, and noise. broadcom?s cable analyzer software can be used with the device to provide remote management of the cable and a first level of diagnostics and fault isolation. the bcm5482 also has esd tolerance that is well above typical industry standards. this prevents esd da mage not only during manufacturing, but also during cesd events in the field. the cesd is an esd event that occurs when an electrically charged network cable is plugged into a network port. this is an issue becoming more prevalent with contemporary cable installations. the bcm5482 can tolerate over 3 kv of cesd. txd[3:0]{2:1} tx_en{2:1} gtxclk{2:1} rx_dv{2:1} rxd[3:0]{2:1} rxc{2:1} sgin(1){2:1} sclk(1){2:1} sgout(1){2:1} mdc{2:1} mdio{2:1} modes led[2:1]{2:1} symbol encoder serial/sgmii led drivers mii registers voltage regulator bias generator auto- negotiation tx dac echo canceller ffe adc pga trd[3:0]{2:1} xtal1 xtal0 rdac regsup[2:1] regcntl[2:1] regsen[2:1] + + + baseline wander correction clock generator timing and phase recovery xtalk canceller dfe and trellis decoder mii mgmt control symbol decoder/ aligner +


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